Generally, semiconductor memory devices may be classified into volatile memory devices and non-volatile memory devices. Volatile memory devices may lose their stored data when their power supplies are interrupted, while non-volatile memory devices may retain their stored data even when their power supplies are interrupted. A flash memory device is a highly integrated non-volatile memory device developed by combining advantages of an erasable programmable read only memory (EPROM) with advantages of an electrically erasable programmable read only memory (EEPROM). A flash memory device may be classified as a NOR-type flash memory device or a NAND-type flash memory device. Since a NOR-type flash memory may be configured to control memory cells independently, operation speed of the NOR-type flash memory device may be relatively high.
FIG. 1 is a cross-sectional view illustrating a conventional non-volatile memory device. Referring to FIG. 1, a gate pattern 20 is provided on a semiconductor substrate 10. The gate pattern 20 includes a gate insulator 22, a charge storage layer 24, an interlayer dielectric 26, and a gate conductive layer 28, which are sequentially stacked on the semiconductor substrate 10. A source region 12 and a drain region 14 are provided at a semiconductor substrate adjacent to the gate pattern 20.
The operation of the non-volatile memory device of FIG. 1 will now be described. During an erase operation, a ground voltage may be applied to the gate conductive layer 28, and an erase voltage (e.g., 10-15 volts) may be applied to the source region 12. Charges stored in the charge storage layer 24 may be ejected to the source region 12 to thereby reduce a threshold voltage of the gate pattern 20.
During the erase operation, band-to-band tunneling (BTBT) current may be generated due to the high erase voltage. The BTBT current may result in generation of an electron-hole pair. The electron may reduce the erase voltage with the migration to the source region 12, and the hole may degrade the gate insulator 22. Punchthrough may be created due to the relatively high voltage of the source region 12, which may deteriorate erase efficiency and reliability of the non-volatile memory device.